3.1 Electronics...Java Apllets used for demonstration purposes

~ELECTRONICS~

PART 3.1

The basic NAND and NOR gates

The following three applets demonstrate the basic 2-input NAND and NOR gates, and a 3-input NAND gate. As in all static CMOS gates, each input is connected to the gates of a pair of N-type and P-type transistor.

Usage of the applets: The applets are similar to the Inverter applet. Wires with logical '1' (VCC) are again shown in red, wires with logical '0' (GND) in blue. Unknown floating values are shown in orange color, a short-circuit is shown in green.

Click the mouse near the inputs to toggle the input voltages and watch the resulting output voltage.
The corresponding combination of input and output values is hightlighted in the function-table on the right.
Click on a function-table entry to select the corresponding input voltages.
Clicking on the top line of the function-table will step through the function-table.

To simplify the applet, only '1' and '0' levels are allowed as input values. Obviously, a short-circuit may occur in these gates as well, if the input voltages are floating near VCC/2 (because both N-type and P-type will be conducting, thereby providing direct paths from VCC to GND).

The NOR gate with 2 inputs:

The 2-input NOR gate is the simplest CMOS gate to illustrate the name complementary MOS: The P-type transistors are connected in series between VCC and the output Y, while the N-type transistors are connected in parallel between GND and the output Y. That is, the N-type and the P-type parts of the CMOS gate are complementary (in respect to topology, and therefore function).

Only if both inputs A and B are '0' (corresponding to GND), there is a conducting path from VCC to the output (output level '1'). A input combination with A or B '1' blocks the path from VCC to the output, but opens a path from GND to the output (so that the output level is '0').

Watch the voltage level between the two P-type transistors. If both are nonconducting, the voltage level is unknown (floating). However, as that wire is not connected to any MOS-transistor gate, there is no problem:

PART 3.2